The present invention relates generally to protective coatings and specifically to an imide polymer containing coating material which includes an non-ionic flurocarbon surfactant to more effectively hermetically topseal electronic circuitry, components, and integrated circuit chip devices from hostile environments as well as provide mechanical stress relief to extend functional electronic device package life.
In the manufacturing of integrated circuit modules, it is customary to seal the metal circuitry and the connections between the substrate and the integrated circuit chip devices with a polymer layer. Typically, a liquid top seal coating is dispensed over the devices and then cured to protect the critical joints and pad areas against corrosion/migration, atmospheric contaminations, and moisture permeation. The coatings also mechanically enhance the chip joint reliability while serving as dielectric insulators. The top seal coating can be applied by spin, spray, dip, or dispense techniques. The method of application is optional dependent upon product requirements.
Polyimide coatings have been used in the past to seal electronic components and circuitry. Prior to the present invention, valid concerns existed in the integrity of the coating coverage of joints which are located underneath the chip devices. The need existed for a more uniform protective coating over all pad areas.
In addition, the increasing complexity of chip designs, which may contain joints in the middle of the chips as well as along the periphery of the chips, requires further improvement in topseal wetting to penetrate between the chips and substrates and insure coverage of the internal pads and solder joints.
Accordingly, it is an objective of the present invention to significantly reduce the surface tension of top layer protective coatings. This greatly facilitates the ability of the coating to uniformly wet all joints and pad areas when, for example, coating modules where the integrated circuit chips are joined to the substrate as described in U.S. Pat. No. 3,429,040. The coatings penetrate under those chips having design configurations that contain internal joints/pads that, like perimeter joints/pads, also require coating coverage.